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Special Graduate Schools
Graduate School of Science and Technology
Department of Information and Electronics Engineering
3. Theses(Master)
반도체메모리테스터에서 임베디드시스템의 사용방안에 관한 연구
- Author(s)
- 김창환
- Advisor
- 김영길
- Department
- 산업대학원 정보전자공학과
- Publisher
- The Graduate School, Ajou University
- Publication Year
- 2009-02
- Language
- kor
- Alternative Abstract
- Nowadays, we use many funcution of IT in the semiconductor testing system. All of them, more important part is how to saving the test time. So, Tester Engineers is studying about the semiconductor testing sequence. We studied about Parallel testing sequence , and apply multi CPU system. This paper presents the multi cpu system in the semiconductor testing system. And , how to think about standard for multi cpu system operation.
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- Special Graduate Schools > Graduate School of Science and Technology > Department of Information and Electronics Engineering > 3. Theses(Master)
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