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최적화된 스위칭 기법을 적용한 3-레벨 T-type 인버터의 직류단 전류 리플 저감 방법
- Alternative Title
- A DC-link Current Ripple Reduction Method with Optimized Switching Scheme in Three-level T-type Inverters
- Author(s)
- 원인정
- Advisor
- 이교범
- Department
- 일반대학원 전자공학과
- Publisher
- The Graduate School, Ajou University
- Publication Year
- 2017-08
- Language
- eng
- Keyword
- 3-레벨 T-type 인버터; 직류단 전류 리플 저감
- Alternative Abstract
- This paper presents an optimized switching strategy for DC-link capacitor current ripple reduction. The large electrolytic capacitors are commonly used at the DC-link of power electronics applications to stabilize the DC-link voltage and supply power for the inverter. The most important factor for designing the DC-link capacitor is allowable current ripple of the capacitor. The DC-link over-ripple causes a high heat-loss, shortened lifespan, and low stability and reliability. Therefore, the large passive components are typically used to reduce the current ripple. However, these passive components lead to a bulky size and slow dynamic response. This paper proposes a new switching scheme to reduce the DC-link capacitor current ripple without any additional hardware or complex calculations. In addition, the common mode voltage and leakage current are decreased by proposed switching method. The efficacy of the proposed method is verified using simulations and experimental results with a three-level T-type inverter.
- Fulltext
- Appears in Collections:
- Graduate School of Ajou University > Department of Electronic Engineering > 3. Theses(Master)
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