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전차원 상태 관측기와 PLL 시스템 모델링을 통한 계통연계형 전력변환 장치의 성능개선
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 이교범 | - |
| dc.contributor.author | 김선민 | - |
| dc.date.accessioned | 2018-11-08T07:56:30Z | - |
| dc.date.available | 2018-11-08T07:56:30Z | - |
| dc.date.issued | 2012-02 | - |
| dc.identifier.other | 12486 | - |
| dc.identifier.uri | https://dspace.ajou.ac.kr/handle/2018.oak/8724 | - |
| dc.description | 학위논문(석사)아주대학교 일반대학원 :전자공학과,2012. 2 | - |
| dc.description.tableofcontents | 제 1 장 서론 1 제 2 장 분산전원 시스템 3 2.1 분산전원 시스템의 필요성 3 2.2 분산전원 시스템의 계통연계 기준 3 2.3 계통 전압의 왜곡현상 5 제 3 장 제안하는 PLL 시스템 7 3.1 전체시스템 구성 7 3.2 PLL 시스템의 선형화 모델 8 3.3 저차 고조파 영향 12 3.4 전차원 상태관측기 설계 14 제 4 장 시뮬레이션 16 제 5 장 결론 22 참고문헌 23 | - |
| dc.language.iso | kor | - |
| dc.publisher | The Graduate School, Ajou University | - |
| dc.rights | 아주대학교 논문은 저작권에 의해 보호받습니다. | - |
| dc.title | 전차원 상태 관측기와 PLL 시스템 모델링을 통한 계통연계형 전력변환 장치의 성능개선 | - |
| dc.title.alternative | Sun-Min,Kim | - |
| dc.type | Thesis | - |
| dc.contributor.affiliation | 아주대학교 일반대학원 | - |
| dc.contributor.alternativeName | Sun-Min,Kim | - |
| dc.contributor.department | 일반대학원 전자공학과 | - |
| dc.date.awarded | 2012. 2 | - |
| dc.description.degree | Master | - |
| dc.identifier.localId | 569962 | - |
| dc.identifier.url | http://dcoll.ajou.ac.kr:9080/dcollection/jsp/common/DcLoOrgPer.jsp?sItemId=000000012486 | - |
| dc.subject.keyword | 관측기 | - |
| dc.description.alternativeAbstract | In a grid connected power conversion system, the phase angle information of a grid voltage is very essential for supplying power to the grid since it is used for active and reactive power control. A Phase Locked Loop (PLL) system is used and should be robust because often the actual grid voltages are usually distorted by unexpected harmonics. However, conventional PLL systems have steady state errors when distorted voltages are used as a PLL input. Furthermore, using this distorted phase angle in the power control could reduce the output power quality. In this paper, the grid voltages are separated into fundamental and harmonic components and a virtual phase voltage is generated from the fundamental component using a Full Order Observer (FOO). Two virtual voltages are used as an input for the PLL system so the phase angle errors can be reduced and the output power quality can be improved. The dynamic characteristics of the PLL system are designed using the modeling method to improve the dynamic response and stability of the whole system. The performance of the proposed method has been verified by a comparative analysis to the conventional PLL system. It is concluded the proposed method works well. | - |
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- Graduate School of Ajou University > Department of Electronic Engineering > 3. Theses(Master)
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