고속 간소화 연속 제거 목록 극 복호기의 효율적인 정렬기 구조

Alternative Title
Efficient Sorting Architecture for Fast Simplified SC List Polar Decoder
Author(s)
노재홍
Alternative Author(s)
Jae Hong Roh
Advisor
선우명훈
Department
일반대학원 전자공학과
Publisher
The Graduate School, Ajou University
Publication Year
2022-02
Language
eng
Keyword
Polar codesSC list (SCL)fast simplified SCLmetric sortersuccessive cancellation (SC)
Alternative Abstract
The successive cancellation (SC) decoding algorithm of polar codes shows worse error correction performances than other codes and suffers from a long latency. The SC list (SCL) and fast simplified SC (FSSC) decoding algorithms have been proposed to improve the drawbacks. In addition, the FSSC list (FSSCL) decoding has been proposed as the state-of-the-art decoding algorithm for polar codes. However, the metric sorter of the SCL decoder expands when the list size L increases and dominantly determines the critical path of the decoder. As a result, the metric sorter of the FSSCL decoder expands drastically because the FSSCL algorithm decodes multiple bits at once. To solve this problem, this paper proposes a path selection method for reducing the number of candidate paths. We analyze the cumulative result of L candidate paths selection from L2 and eliminate the unnecessary candidate paths. Finally, we simplify the bitonic sorter for the FSSCL decoder. The number of inputs is reduced by 50%, and the error correction performance is degraded less than 0.1dB on frame error rate (FER) 10-3 in L=4 and 8. The proposed sorter has up to 40% lower compare-and-swap unit (CASU) stages and up to 67% lower CASUs compared to other sorters in L=4.
URI
https://dspace.ajou.ac.kr/handle/2018.oak/21103
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Graduate School of Ajou University > Department of Electronic Engineering > 3. Theses(Master)
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