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T-type 3-레벨 인버터 시스템의 개방성 고장 허용제어 기법
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 이교범 | - |
| dc.contributor.author | 최의민 | - |
| dc.date.accessioned | 2018-11-08T08:02:32Z | - |
| dc.date.available | 2018-11-08T08:02:32Z | - |
| dc.date.issued | 2013-02 | - |
| dc.identifier.other | 13535 | - |
| dc.identifier.uri | https://dspace.ajou.ac.kr/handle/2018.oak/9732 | - |
| dc.description | 학위논문(석사)아주대학교 일반대학원 :전자공학과,2013. 2 | - |
| dc.description.tableofcontents | 1. INTRODUCTION 1 2. DESCRIPTION OF T-TYPE 3-LEVEL INVERTER 3 3. ANALYSIS OF T-TYPE 3-LEVEL INVERTER DURING AN OPEN-SWITCH FAULT 7 3.1 Change of Currents and Pole-voltage 7 3.2 Change of Neutral-point Voltage 10 4. PROPOSED FAULT-TOLERANT CONTROL STRATEGY 14 4.1 Fault occurring in half bridge switches (Sx1, Sx4) 14 4.2 Fault occurring in neutral-point switches (Sx2, Sx3) 21 5. SIMULATIONS 23 6. EXPERIMENTS 27 7. CONCLUSIONS 32 | - |
| dc.language.iso | eng | - |
| dc.publisher | The Graduate School, Ajou University | - |
| dc.rights | 아주대학교 논문은 저작권에 의해 보호받습니다. | - |
| dc.title | T-type 3-레벨 인버터 시스템의 개방성 고장 허용제어 기법 | - |
| dc.title.alternative | Choi Ui-Min | - |
| dc.type | Thesis | - |
| dc.contributor.affiliation | 아주대학교 일반대학원 | - |
| dc.contributor.alternativeName | Choi Ui-Min | - |
| dc.contributor.department | 일반대학원 전자공학과 | - |
| dc.date.awarded | 2013. 2 | - |
| dc.description.degree | Master | - |
| dc.identifier.localId | 570905 | - |
| dc.identifier.url | http://dcoll.ajou.ac.kr:9080/dcollection/jsp/common/DcLoOrgPer.jsp?sItemId=000000013535 | - |
| dc.description.alternativeAbstract | This paper proposes a fault-tolerant control strategy for T-type 3-level inverter systems. The proposed fault-tolerant strategy is explained for two cases: the faulty condition of half-bridge switches and neutral-point switches. The performance of the T-type inverter systems improves considerably by the proposed fault tolerant algorithm when a switch fails. The proposed method does not require additional components and complex calculations. Simulation and experimental results verify the validity and feasibility of the proposed fault diagnosis and fault-tolerant control strategy. | - |
- Appears in Collections:
- Graduate School of Ajou University > Department of Electronic Engineering > 3. Theses(Master)
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