광대역 RF 수신단을 위한 하모닉 제거 믹서와 간섭 신호 제거 LNA 설계
DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | 권익진 | - |
dc.contributor.author | 차민연 | - |
dc.date.accessioned | 2018-11-08T07:59:53Z | - |
dc.date.available | 2018-11-08T07:59:53Z | - |
dc.date.issued | 2012-02 | - |
dc.identifier.other | 12273 | - |
dc.identifier.uri | https://dspace.ajou.ac.kr/handle/2018.oak/9574 | - |
dc.description | 학위논문(석사)아주대학교 일반대학원 :전자공학과,2012. 2 | - |
dc.language.iso | eng | - |
dc.publisher | The Graduate School, Ajou University | - |
dc.rights | 아주대학교 논문은 저작권에 의해 보호받습니다. | - |
dc.title | 광대역 RF 수신단을 위한 하모닉 제거 믹서와 간섭 신호 제거 LNA 설계 | - |
dc.title.alternative | Cha Minyeon | - |
dc.type | Thesis | - |
dc.contributor.affiliation | 아주대학교 일반대학원 | - |
dc.contributor.alternativeName | Cha Minyeon | - |
dc.contributor.department | 일반대학원 전자공학과 | - |
dc.date.awarded | 2012. 2 | - |
dc.description.degree | Master | - |
dc.identifier.localId | 570204 | - |
dc.identifier.url | http://dcoll.ajou.ac.kr:9080/dcollection/jsp/common/DcLoOrgPer.jsp?sItemId=000000012273 | - |
dc.description.alternativeAbstract | A harmonic rejection mixer (HRM) with a current mirror amplifier and a blocker cancelling low noise amplifier (LNA) are proposed for wideband RF receivers. In the proposed HRM, gain ratio can be set accurately using the current mirror amplifier to achieve high harmonic rejection ratio without mismatch calibration circuits. Owing to a folded switching stage, the harmonic rejection ratio of the HRM is also immune to supply voltage variation and the HRM can be designed at lower supply voltage compared to a conventional HRM. Measured third and fifth-order harmonic rejection ratios of the proposed HRM are 46.5 and 44.8 dB, respectively. The harmonic rejection mixer is fabricated in 0.13 μm CMOS technology and consumes 22.4 mA from 1.2 V supply voltage. In the proposed blocker cancelling LNA, a CMOS LNA with an integrated notch feedback for blocker cancellation is described. The proposed blocker cancelling technique adopts an integrated notch feedback stage. The blocker injected into the LNA input through the notch filter with LC resonators is subsequently subtracted from the input signal. A Q-enhancement circuit is used to improve the quality factor of the LC resonators. The LNA with the integrated notch feedback achieves blocker rejection of 21.6 dB with a blocker at 80 MHz offset. The noise figure is 6.1 dB at 1.9 GHz center frequency, the input-referred third-order intercept point is -16.7 dBm and the LNA consumes 37.8 mA from 1.2 V supply voltage when the notch feedback stage is on. The blocker cancellation LNA is designed in a 0.13 μm CMOS technology. | - |
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