plc 프로그램의 offline validation 을 위한 XML 기반의 Generic Model Simulator
DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | 왕기남 | - |
dc.contributor.author | 슈라지단골 | - |
dc.date.accessioned | 2018-11-08T07:51:40Z | - |
dc.date.available | 2018-11-08T07:51:40Z | - |
dc.date.issued | 2007-02 | - |
dc.identifier.other | 2129 | - |
dc.identifier.uri | https://dspace.ajou.ac.kr/handle/2018.oak/8185 | - |
dc.description | 학위논문(석사)--아주대학교 일반대학원 :공학계열,2007.2 | - |
dc.description.tableofcontents | 1. Introduction = 1 2. Background = 3 3. Programmable Logic Controllers (PLC) = 5 3.1 Overview of PLC = 6 3.2 Operation of PLC = 7 3.3 Advantages and applications of PLC = 8 3.3.1 Advantages = 8 3.3.2 Applications = 9 3.4 IEC 61131-3 = 9 3.4.1 Ladder Diagram (LD) = 10 3.4.2 Instruction List (IL) = 11 3.4.3 Function Block Diagram (FBD) = 11 3.4.4 Structured Text (ST) = 12 3.4.5 Sequential Function Chart (SFC) = 13 4. Extensible Markup Language (XML) = 14 5. Validation of PLC program = 17 5.1 General procedure for validation of PLC program = 17 5.2 Proposed software architecture = 18 5.2.1 XML based Generic model editor and simulator = 19 5.2.2 3D graphic model of target system = 22 5.2.3 Interface modules with 3D graphic simulator and software PLC = 23 6. Illustration and Implementation = 24 7. Conclusion and Future Works = 29 References = 30 | - |
dc.language.iso | eng | - |
dc.publisher | The Graduate School, Ajou University | - |
dc.rights | 아주대학교 논문은 저작권에 의해 보호받습니다. | - |
dc.title | plc 프로그램의 offline validation 을 위한 XML 기반의 Generic Model Simulator | - |
dc.title.alternative | Suraj Dangol | - |
dc.type | Thesis | - |
dc.contributor.affiliation | 아주대학교 일반대학원 | - |
dc.contributor.alternativeName | Suraj Dangol | - |
dc.contributor.department | 일반대학원 공학계열 | - |
dc.date.awarded | 2007. 2 | - |
dc.description.degree | Master | - |
dc.identifier.localId | 565733 | - |
dc.identifier.url | http://dcoll.ajou.ac.kr:9080/dcollection/jsp/common/DcLoOrgPer.jsp?sItemId=000000002129 | - |
dc.subject.keyword | Offline Verification and Validation (V&V) | - |
dc.subject.keyword | Programmable logical controllers (PLC) | - |
dc.subject.keyword | Flexible Manufacturing System (FMS) | - |
dc.subject.keyword | Generic Model | - |
dc.description.alternativeAbstract | One of the major concerns of a flexible manufacturing system (FMS) is the just-in-time production and coping up to the market demand with rapid speed and accuracy. To survive in the competent market avoidance of downtime and ramp-up time delay is very important. The control logic plays vital role in an agile manufacturing system for proper functioning of the FMS. This demands control programs to be more flexible and reusable. These days consumer product life cycles are constantly shortening consequently, the introduction of new products into FMS becomes more frequent. As programmable logic controllers (PLCs) control most of the automation section, designing new PLC program and implementing for new product production will effect on performance of FMS. In addition, modern manufacturing units are becoming more complex and safety critical. There is a need of method to validate PLC program without causing any interruption in system i.e. avoiding downtime and ramp-up time. In this thesis, we present XML based generic model formalized by finite state machine extended with time for the offline validation. Offline validation of PLC program is a method to detect error in PLC program before implementing in a real system to prevent hazardous accident and to avoid downtime and ramp-up time. The generic model mimics the dynamic behavior of devices in a work cell and provides real system like environment to PLC programmer for validation. To emulate the system behavior, IGRIP digital manufacturing package and XML based generic model simulator are used. It will be a complementary approach for offline validation of the PLC program. | - |
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