2.45GHz 대역의 PLL Lock Time 및 Phase Noise 개선에 관한 연구

DC Field Value Language
dc.contributor.advisor신철행-
dc.contributor.author송형석-
dc.date.accessioned2018-11-08T07:37:48Z-
dc.date.available2018-11-08T07:37:48Z-
dc.date.issued2002-
dc.identifier.other7807-
dc.identifier.urihttps://dspace.ajou.ac.kr/handle/2018.oak/6071-
dc.description학위논문(석사)--아주대학교 대학원 :전자공학과,2002-
dc.language.isokor-
dc.publisherThe Graduate School, Ajou University-
dc.rights아주대학교 논문은 저작권에 의해 보호받습니다.-
dc.title2.45GHz 대역의 PLL Lock Time 및 Phase Noise 개선에 관한 연구-
dc.typeThesis-
dc.contributor.affiliation아주대학교 일반대학원-
dc.contributor.department일반대학원 전자공학과-
dc.date.awarded2002. 8-
dc.description.degreeMaster-
dc.identifier.localId562869-
dc.identifier.urlhttp://dcoll.ajou.ac.kr:9080/dcollection/jsp/common/DcLoOrgPer.jsp?sItemId=000000007807-
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Graduate School of Ajou University > Department of Electronic Engineering > 3. Theses(Master)
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