AI Hardware Accelerator Design based on Prognosis Prediction Deep Learning Network for Cancer Risk Stratification

DC Field Value Language
dc.contributor.advisor선우명훈-
dc.contributor.author임영준-
dc.date.accessioned2025-01-25T01:36:06Z-
dc.date.available2025-01-25T01:36:06Z-
dc.date.issued2023-02-
dc.identifier.other32395-
dc.identifier.urihttps://dspace.ajou.ac.kr/handle/2018.oak/24607-
dc.description학위논문(석사)--아주대학교 일반대학원 :전자공학과,2023. 2-
dc.description.tableofcontentsI.Introduction 1 <br>II. Proposed Method 5 <br> A. Proposed Deep Learning Network Architecture 5 <br> B. Data Collection 6 <br> C. Loss Function 9 <br> D. Integer Quantization Method 9 <br> E. AI Hardware Accelerator Architecture 11 <br> F. Hyperparameters and Environment 13 <br>III. Experimental Results 14 <br> A. Statistical Analysis and Evaluation Metrics Method 14 <br> B. Data Characteristics 15 <br> C. Network Evaluation 17 <br> D. Quantization Results and Comparison 26 <br> E. FPGA Implementation Results 27 <br>IV. Conclusion 30-
dc.language.isoeng-
dc.publisherThe Graduate School, Ajou University-
dc.rights아주대학교 논문은 저작권에 의해 보호받습니다.-
dc.titleAI Hardware Accelerator Design based on Prognosis Prediction Deep Learning Network for Cancer Risk Stratification-
dc.title.alternative암 예후 예측 딥러닝 네트워크 기반 AI 하드웨어 가속기 설계-
dc.typeThesis-
dc.contributor.affiliation아주대학교 대학원-
dc.contributor.department일반대학원 전자공학과-
dc.date.awarded2023-02-
dc.description.degreeMaster-
dc.identifier.localIdT000000032395-
dc.identifier.urlhttps://dcoll.ajou.ac.kr/dcollection/common/orgView/000000032395-
dc.subject.keywordAI-
dc.subject.keyword딥러닝-
dc.subject.keyword아주대학교-
dc.subject.keyword하드웨어-
dc.description.alternativeAbstractWith the recent progress of artificial intelligence (AI) technology, deep learning-based approaches in the medical field have increased lately. This paper proposes a deep learning network using Ajou University Hospital’s 10-year breast cancer patient dataset to predict the recurrence year of cancer. The proposed network analyzes the whole prognostic factors of the patient. In addition, the influence of each prognostic factor was analyzed by excluding the factors in the training respectively. The network showed high performance by achieving 0.91 area under the receiver operating characteristic (ROC) curve (AUC). For AI hardware accelerator implementation, the proposed fixed 16-bit integer quantization method was performed to compress the parameter of the proposed network. The proposed quantization method enabled 37.41% parameter compression of the proposed network. The accelerator showed higher throughput and lower power consumption than the graphic processing unit (GPU). The proposed hardware accelerator architecture is implemented on the Xilinx Kintex UltraScale+ field programmable gate array (FPGA).-
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Graduate School of Ajou University > Department of Electronic Engineering > 3. Theses(Master)
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