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Graduate School of Ajou University
Department of Space Electronics Information Engineering
3. Theses(Master)
중성점 전압 리플 저감이 가능한 3-레벨 NPC 인버터의 새로운 DPWM 방법
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 이교범 | - |
| dc.contributor.author | 유승종 | - |
| dc.date.accessioned | 2018-11-08T08:06:05Z | - |
| dc.date.available | 2018-11-08T08:06:05Z | - |
| dc.date.issued | 2016-02 | - |
| dc.identifier.other | 21961 | - |
| dc.identifier.uri | https://dspace.ajou.ac.kr/handle/2018.oak/10506 | - |
| dc.description | 학위논문(석사)--아주대학교 일반대학원 :우주전자정보공학과,2016. 2 | - |
| dc.description.tableofcontents | 제 1 장 서론 1 제 2 장 3-레벨 NPC 인버터 4 제 3 장 기존의 DPWM 기법 8 제 4 장 제안하는 DPWM 기법 10 4.1. 중성점 전류에 대한 분석 10 4.2. MI 0.5 이상에서의 제안하는 DPWM 기법 12 4.3. MI 0.5 이하에서의 제안하는 DPWM 기법 16 4.4. 각 모듈레이션 기법 별 손실 분석 20 제 5 장 시뮬레이션 결과 22 제 6 장 실험 결과 27 제 7 장 결론 31 참고문헌 32 | - |
| dc.language.iso | kor | - |
| dc.publisher | The Graduate School, Ajou University | - |
| dc.rights | 아주대학교 논문은 저작권에 의해 보호받습니다. | - |
| dc.title | 중성점 전압 리플 저감이 가능한 3-레벨 NPC 인버터의 새로운 DPWM 방법 | - |
| dc.title.alternative | A New Discontinuous PWM Method of a Three-Level NPC Inverter for Neutral-Point Voltage Ripple Reduction | - |
| dc.type | Thesis | - |
| dc.contributor.affiliation | 아주대학교 일반대학원 | - |
| dc.contributor.alternativeName | Seungjong Yoo | - |
| dc.contributor.department | 일반대학원 우주전자정보공학과 | - |
| dc.date.awarded | 2016. 2 | - |
| dc.description.degree | Master | - |
| dc.identifier.localId | 739662 | - |
| dc.identifier.url | http://dcoll.ajou.ac.kr:9080/dcollection/jsp/common/DcLoOrgPer.jsp?sItemId=000000021961 | - |
| dc.subject.keyword | PWM | - |
| dc.subject.keyword | DPWM | - |
| dc.subject.keyword | 3-레벨 NPC 인버터 | - |
| dc.description.alternativeAbstract | A new pulse width modulation (PWM) strategy which is an alternative approach of the discontinuous PWM (DPWM) for a three-level neutral-point-clamped (NPC) inverter is proposed in this paper. A three-level NPC inverter is completely mature and very well established topology in high-power applications. However, the three-level NPC inverter has the inherent problem of neutral-point voltage unbalancing due to the split dc-link capacitors. This structure can cause the large neutral-point voltage ripple. Furthermore, output currents of the three-level NPC inverter can be distorted by the neutral-point voltage ripple. Since the influence of the neutral-point voltage ripple to output, it must be controlled. In this paper, a new DPWM method using two different offsets for the neutral-point ripple reduction is proposed and the effectiveness of the proposed DPWM method is verified by using the simulation and the experimental results. | - |
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